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| Web based magazine, No.3, June 15, 2007 |
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Today, for dry etching of silicon in MEMS/MOEMS applications so called Deep Reactive Ion Etching (DRIE) systems are used which, in regard to standard RIE systems include an additional Inductive Coupled Source (ICP). By this and in a connection with a capacitive coupled radio-frequency RF source, these etch systems enable high etching rates (15 mm/min), high selectivity (up to 200) and perfect control of etching profiles (near vertical profiles with minimal undercuts). In addition to these approaches, in LMSE we have developed recently a new optimised process of similar anisotropic RIE of silicon on a standard RIE system, Plasmalab mP 80 from Oxford Instruments, Plasma Technology, UK that is basically designed for anisotropic and selective etching of thin silicon oxide and nitride layers on silicon substrate. The developed process works at room temperature using SF6/O2 chemistry. By a proper control of process parameters we can successfully control etching parameters. Thus we are achieving etching rate of 1.6 um/min, anisotropy of 0.9, undercut less than 5% relative to the etching depth, 10% uniformity across the wafer, and selectivity to silicon oxide and photoresist of 90 and 20, respectively. An example of anisotropic RIE etching of silicon pillars array under thin oxide mask is shown in SEM photomicrograph below. Evaluated etching process enables the realization of various 3D micro/nano structures such as high aspect ratio trenches, sharp micro/nano tips and many other subparts for MEMS and MOEMS. |
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